It is a well known fact in electronics that the speed with which a signal may propagate along a conductor is dependent upon the capacitance of the conductor and the connected to element along with the resistance of the conductor. In large array-type integrated circuits, such as dynamic random access memories (DRAMS), one line, such as the pull up line feeding the sense amplifiers of the DRAM, may be connected to a large number of elements, such as the sense amplifiers. The resistance of a lead is directly proportional to the length of a lead and inversely proportional to the cross sectional area of the lead. In large arrays some leads must be necessarily long. If high speed or appreciable current is required to be carried on these leads a wide cross section (assuming a relatively fixed conductor thickness because of process limitations) must be fabricated, thus occupying valuable space on the integrated circuit.
For example, in a 1 megabit DRAM there are 2,048 sense amplifiers laid out in two rows. A common pull up signal requires a metal lead running to all the rows of sense amplifiers approximately 37.mu. wide lead running the length of each band of sense amplifiers. In the art of integrated circuit design the space occupied by these leads is enormous and the layout of these leads provides substantial interference with other leads which may be more efficiently laid out.